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Verilog HDL Design Examples

Joseph Cavanagh

Tavaline hind €224,31
Müügihind €224,31 Tavaline hind €231,25 Väljamüük

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Autorius Joseph Cavanagh
Leidimo metai 2017 m.
Puslapių skč. 674 psl.
Viršelis Kietas viršelis
ISBN 9781138099951
Kategorijos Arvutigraafika

Verilog HDL Design Examples

The book presents the Verilog language with a variety of examples to provide a firm foundation in the design of the digital system using Verilog HDL. It places emphasis on the detailed design of various Verilog projects that include the design module, test bench module, and outputs from the simulator illustrating the design's functional operation.

Book cover of: Verilog HDL Design Examples. By: Joseph Cavanagh

Verilog HDL Design Examples

Tavaline hind €224,31
Müügihind €224,31 Tavaline hind €231,25